X1004 not recognized on RPi5
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Hi,
I was excited to recently get a X1004 to experiment with. I already had NVMe and PoE+ for RPi5 from HackerGadgets that I have been successfully using with a Coral Edge TPU (similar to hailo-8).
I installed the X1004 on a brand new RPi5, and inserted a LARES M.2 2280 NVMe PCIe 2TB into slot 2, and the Coral Edge TPU into slot 1. Updated the bootloader, added the line to rpi-eeprom-config.
But when I did lspci, I don't see the HAT at all. There is a red LED glowing on the physical LARES card that is on, and there is a blue LED glowing on the X1004 on slot 1. But there is no blue LED glowing for slot 2.
I removed the Coral TPU, and moved the LARES card to slot 1. Still nothing. However, now I have a blue LED glowing on X1004 on slot 2, and the red LED on the physical LARES card is glowing. Below are the configuration items I have.$ vcgencmd bootloader_version 2025/08/27 20:01:47 version 000d3ca289ae790a2e46225eb11b319c67642b1a (release) timestamp 1756321307 update-time 1760567112 capabilities 0x0000007f$ sudo rpi-eeprom-config [all] BOOT_UART=1 BOOT_ORDER=0xf461 NET_INSTALL_AT_POWER_ON=1 PCIE_PROBE=1$ lspci -v 00:00.0 PCI bridge: Broadcom Inc. and subsidiaries BCM2712 PCIe Bridge (rev 30) (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 38 Bus: primary=00, secondary=01, subordinate=01, sec-latency=0 Memory behind bridge: 00000000-005fffff [size=6M] [32-bit] Prefetchable memory behind bridge: [disabled] [64-bit] Capabilities: <access denied> Kernel driver in use: pcieport 01:00.0 Ethernet controller: Raspberry Pi Ltd RP1 PCIe 2.0 South Bridge Flags: bus master, fast devsel, latency 0, IRQ 38 Memory at 1f00410000 (32-bit, non-prefetchable) [size=16K] Memory at 1f00000000 (32-bit, non-prefetchable) [virtual] [size=4M] Memory at 1f00400000 (32-bit, non-prefetchable) [size=64K] Capabilities: <access denied> Kernel driver in use: rp1Here is the end of my /boot/firmware/config.txt:
[all] # Enable the PCIe External connector. dtparam=pciex1 # kernel=kernel8.img # Enable Pineboards Hat Ai # dtoverlay=pineboards-hat-ai # PoE+ HAT supply power via GPIO usb_max_current_enable=1(I have kernel8.img as I need that for the Coral Edge TPU board.)
$ dmesg | grep pci [ 0.000000] Kernel command line: reboot=w coherent_pool=1M 8250.nr_uarts=1 pci=pcie_bus_safe bcm2708_fb.fbwidth=1920 bcm2708_fb.fbheight=1080 bcm2708_fb.fbdepth=16 bcm2708_fb.fbswap=1 smsc95xx.macaddr=2C:CF:67:B5:30:59 vc_mem.mem_base=0x3fc00000 vc_mem.mem_size=0x40000000 console=ttyAMA10,115200 console=tty1 root=PARTUUID=eabf1ada-02 rootfstype=ext4 fsck.repair=yes rootwait quiet splash plymouth.ignore-serial-consoles cfg80211.ieee80211_regdom=US [ 0.276600] brcm-pcie 1000110000.pcie: host bridge /axi/pcie@110000 ranges: [ 0.276604] brcm-pcie 1000110000.pcie: No bus range found for /axi/pcie@110000, using [bus 00-ff] [ 0.276612] brcm-pcie 1000110000.pcie: MEM 0x1b80000000..0x1bffffffff -> 0x0080000000 [ 0.276616] brcm-pcie 1000110000.pcie: MEM 0x1800000000..0x1b7fffffff -> 0x0400000000 [ 0.276620] brcm-pcie 1000110000.pcie: IB MEM 0x0000000000..0x0fffffffff -> 0x1000000000 [ 0.277758] brcm-pcie 1000110000.pcie: Forcing gen 2 [ 0.277923] brcm-pcie 1000110000.pcie: PCI host bridge to bus 0000:00 [ 0.277925] pci_bus 0000:00: root bus resource [bus 00-ff] [ 0.277928] pci_bus 0000:00: root bus resource [mem 0x1b80000000-0x1bffffffff] (bus address [0x80000000-0xffffffff]) [ 0.277930] pci_bus 0000:00: root bus resource [mem 0x1800000000-0x1b7fffffff pref] (bus address [0x400000000-0x77fffffff]) [ 0.277939] pci 0000:00:00.0: [14e4:2712] type 01 class 0x060400 [ 0.277960] pci 0000:00:00.0: PME# supported from D0 D3hot [ 0.278575] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring [ 0.705114] brcm-pcie 1000110000.pcie: link down [ 0.709814] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01 [ 0.709821] pci 0000:00:00.0: PCI bridge to [bus 01] [ 0.709827] pci 0000:00:00.0: Max Payload Size set to 512/ 512 (was 128), Max Read Rq 512 [ 0.709911] pcieport 0000:00:00.0: PME: Signaling with IRQ 37 [ 0.709977] pcieport 0000:00:00.0: AER: enabled with IRQ 37 [ 0.710060] pci_bus 0000:01: busn_res: [bus 01] is released [ 0.710100] pci_bus 0000:00: busn_res: [bus 00-ff] is released [ 0.710183] brcm-pcie 1000120000.pcie: host bridge /axi/pcie@120000 ranges: [ 0.710186] brcm-pcie 1000120000.pcie: No bus range found for /axi/pcie@120000, using [bus 00-ff] [ 0.710192] brcm-pcie 1000120000.pcie: MEM 0x1f00000000..0x1ffffffffb -> 0x0000000000 [ 0.710196] brcm-pcie 1000120000.pcie: MEM 0x1c00000000..0x1effffffff -> 0x0400000000 [ 0.710201] brcm-pcie 1000120000.pcie: IB MEM 0x1f00000000..0x1f003fffff -> 0x0000000000 [ 0.710204] brcm-pcie 1000120000.pcie: IB MEM 0x0000000000..0x0fffffffff -> 0x1000000000 [ 0.711361] brcm-pcie 1000120000.pcie: Forcing gen 2 [ 0.711384] brcm-pcie 1000120000.pcie: PCI host bridge to bus 0000:00 [ 0.711386] pci_bus 0000:00: root bus resource [bus 00-ff] [ 0.711388] pci_bus 0000:00: root bus resource [mem 0x1f00000000-0x1ffffffffb] (bus address [0x00000000-0xfffffffb]) [ 0.711391] pci_bus 0000:00: root bus resource [mem 0x1c00000000-0x1effffffff pref] (bus address [0x400000000-0x6ffffffff]) [ 0.711398] pci 0000:00:00.0: [14e4:2712] type 01 class 0x060400 [ 0.711415] pci 0000:00:00.0: PME# supported from D0 D3hot [ 0.711990] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring [ 0.817116] brcm-pcie 1000120000.pcie: link up, 5.0 GT/s PCIe x4 (!SSC) [ 0.817133] pci 0000:01:00.0: [1de4:0001] type 00 class 0x020000 [ 0.817145] pci 0000:01:00.0: reg 0x10: [mem 0xffffc000-0xffffffff] [ 0.817151] pci 0000:01:00.0: reg 0x14: [mem 0xffc00000-0xffffffff] [ 0.817157] pci 0000:01:00.0: reg 0x18: [mem 0xffff0000-0xffffffff] [ 0.817218] pci 0000:01:00.0: supports D1 [ 0.817220] pci 0000:01:00.0: PME# supported from D0 D1 D3hot D3cold [ 0.829122] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01 [ 0.829129] pci 0000:00:00.0: BAR 8: assigned [mem 0x1f00000000-0x1f005fffff] [ 0.829131] pci 0000:01:00.0: BAR 1: assigned [mem 0x1f00000000-0x1f003fffff] [ 0.829135] pci 0000:01:00.0: BAR 2: assigned [mem 0x1f00400000-0x1f0040ffff] [ 0.829139] pci 0000:01:00.0: BAR 0: assigned [mem 0x1f00410000-0x1f00413fff] [ 0.829142] pci 0000:00:00.0: PCI bridge to [bus 01] [ 0.829144] pci 0000:00:00.0: bridge window [mem 0x1f00000000-0x1f005fffff] [ 0.829147] pci 0000:00:00.0: Max Payload Size set to 256/ 512 (was 128), Max Read Rq 512 [ 0.829154] pci 0000:01:00.0: Max Payload Size set to 256/ 256 (was 128), Max Read Rq 512 [ 0.829198] pcieport 0000:00:00.0: enabling device (0000 -> 0002) [ 0.829219] pcieport 0000:00:00.0: PME: Signaling with IRQ 38 [ 0.829279] pcieport 0000:00:00.0: AER: enabled with IRQ 38
I am not sure what else to try.
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